Q1: How much is the price of IP core?
Q2: How is license condition?
Q3: I am from university. For academic use, can it provide at discount price?
Q4: Is it possible to evaluate on user board?
Q5: Can no time limitation version be provided from free evaluation file?
Q6: Does SATA-IP support Linux driver?
Q7: Can SATA-IP core interface directly without soft-core CPU?
Q8: Can Spartan-6, Virtex-6 support SATA-3?
Q9: How purchasing AB09-FMCRAID?
Q10: How is support condition?
Q11: What achievements does SATA-IP core have?
Please inform following your information first, then DesignGateway will send price information.
This is project license. The license condition is 1 project netlist license. In one project, you can produce your product with our IP without quantity limitation and any terms. When you start new project, you must ask us repeat order (we will provide discount price for 2nd license or later.)
"Project" is defined at license agreement document when purchasing. It specifies project name, target device, board name and Licensed Contractors if applicable.
We can provide IP core as "Academic Package". To discount price, it is non-support and attaching security chip "IP Lock" is required.
What is IP Lock? please see IP Lock page
DesignGateway provide time limited evaluation file for Xilinx/Altera FPGA boards to evaluate on real board before purchasing. The purpose of free evaluation file is to evaluate performance and check operation of both IP core and your HDD/SSD. Therefore we do not prepare free evaluation file for your original board.
It cannot do. We release it for you to evaluate performance and check operation of both IP core and your HDD/SSD.
DesignGateway releases Linux system reference design document on our web site. We can provide Linux driver for ML507 (Virtex-5 FXT) and HDL code of hardware I/F when you purchase SATA-IP core.
For Linux driver for other FPGA, we can support and develop as design service. Please inquiry us.
Yes it can do. It is possible to control SATA-IP core by pure hardware logic such as state machine. We have many experiences and achievements of such controller development. So we can provide such controller as another IP core or support and develop as design service. Please inquiry us.
However, the performance of the controller by pure hardware logic does not improve from soft-core CPU (MicroBlaze or NIOS2).
It cannot do from transceiver limitation. The Transceivers of these devices do not support SATA-3 standard. Xilinx devices will support SATA-3 after 7 Series.
IP product includes free support for 3 months from purchasing.
We support in English by E-mail. We also have annual charged support.
More than 30 applications in USA, Europe and Japan. In year 2009, NASA (The National Aeronautics and Space Administration) adopted this IP core for aerospace development.